Sciweavers

324 search results - page 48 / 65
» Reducing Expression Size Using Rule-Based Integration
Sort
View
DAC
2000
ACM
14 years 8 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
ASPLOS
1992
ACM
13 years 11 months ago
Non-Volatile Memory for Fast, Reliable File Systems
Given the decreasing cost of non-volatile RAM (NVRAM), by the late 1990's it will be feasible for most workstations to include a megabyte or more of NVRAM, enabling the desig...
Mary Baker, Satoshi Asami, Etienne Deprit, John K....
SMA
2009
ACM
125views Solid Modeling» more  SMA 2009»
14 years 2 months ago
Stable mesh decimation
Current mesh reduction techniques, while numerous, all primarily reduce mesh size by successive element deletion (e.g. edge collapses) with the goal of geometric and topological f...
Chandrajit L. Bajaj, Andrew Gillette, Qin Zhang
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
14 years 17 days ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
CVPR
2010
IEEE
14 years 4 months ago
Locality-constrained Linear Coding for Image Classification
The traditional SPM approach based on bag-of-features (BoF) must use nonlinear classifiers to achieve good image classification performance. This paper presents a simple but effec...
Jinjun Wang, Jianchao Yang, Kai Yu, Fengjun Lv