339 search results - page 43 / 68 » Reducing Memory Ordering Overheads in Software Transactional... |
CHES
2000
Springer
14 years 8 days ago
2000
Springer
Abstract. Since the announcement of the Differential Power Analysis (DPA) by Paul Kocher and al., several countermeasures were proposed in order to protect software implementations...
CAL
2010
13 years 5 months ago
2010
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
DAC
2001
ACM
14 years 9 months ago
2001
ACM
In modern embedded systems including communication and multimedia applications, large fraction of power is consumed during memory access and data transfer. Thus, buses should be d...
CC
2007
Springer
14 years 2 months ago
2007
Springer
Reference counting is a classical garbage collection method. Recently, a series of papers have extended the basic method to drastically reduce its notorious overhead and extend the...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...