135 search results - page 16 / 27 » Reducing Power Dissipation in SRAM during Test |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
CLUSTER
2005
IEEE
14 years 1 months ago
2005
IEEE
We present a feasibility study of a power-reduction scheme that reduces the thermal power of processors by lowering frequency and voltage in the context of high-performance comput...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power ...
VEE
2006
ACM
14 years 1 months ago
2006
ACM
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
AIA
2007
13 years 9 months ago
2007
Designers aim at fast but low-power consuming integrated circuits. Since high processing speed always comes with high energy demands, the literature provides several ways to reduc...