293 search results - page 10 / 59 » Reducing Power with Performance Constraints for Parallel Spa... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
IEEEPACT
1999
IEEE
13 years 12 months ago
1999
IEEE
The performance of applications on large shared-memory multiprocessors with coherent caches depends on the interaction between the granularity of data sharing, the size of the coh...
PPOPP
2012
ACM
12 years 3 months ago
2012
ACM
Analysis of massive graphs has emerged as an important area for massively parallel computation. In this paper, it is shown how the Fresh Breeze trees-of-chunks memory model may be...