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CONIELECOMP
2011
IEEE
12 years 11 months ago
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
Jorge Martínez-Carballido, Jorge Guevara-Es...
DELTA
2006
IEEE
13 years 11 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
13 years 11 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
ITC
1996
IEEE
107views Hardware» more  ITC 1996»
13 years 11 months ago
Orthogonal Scan: Low-Overhead Scan for Data Paths
Orthogonal scan paths, which follow the path of the data flow, can be used in data path designs to reduce the test overhead -- area, delay and test application time -- by sharing ...
Robert B. Norwood, Edward J. McCluskey
SOCIALCOM
2010
13 years 5 months ago
Anomaly Detection in Feedback-based Reputation Systems through Temporal and Correlation Analysis
As the value of reputation systems is widely recognized, the incentive to manipulate such systems is rapidly growing. We propose TAUCA, a scheme that identifies malicious users and...
Yuhong Liu, Yan (Lindsay) Sun