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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 6 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
ICASSP
2011
IEEE
13 years 15 days ago
Cooperative sensing in cognitive networks under malicious attack
Abstract—This paper considers cooperative sensing in cognitive networks under Spectrum Sensing Data Falsification attack (SSDF) in which malicious users can intentionally send f...
Mai Abdelhakim, Lei Zhang, Jian Ren, Tongtong Li
IPPS
2010
IEEE
13 years 6 months ago
Designing high-performance and resilient message passing on InfiniBand
Abstract--Clusters featuring the InfiniBand interconnect are continuing to scale. As an example, the "Ranger" system at the Texas Advanced Computing Center (TACC) include...
Matthew J. Koop, Pavel Shamis, Ishai Rabinovitz, D...
SLIP
2006
ACM
14 years 2 months ago
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
IAT
2008
IEEE
14 years 3 months ago
Understanding Social Networks Using Formal Concept Analysis
Social networks are very popular nowadays and the understanding of their inner structure seems to be promising area. Several approaches for the social network structure visualizat...
Václav Snásel, Zdenek Horak, Ajith A...