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» Reducing computational complexity with array predicates
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PVLDB
2011
13 years 2 months ago
Column-Oriented Storage Techniques for MapReduce
Users of MapReduce often run into performance problems when they scale up their workloads. Many of the problems they encounter can be overcome by applying techniques learned from ...
Avrilia Floratou, Jignesh M. Patel, Eugene J. Shek...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 1 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
BMCBI
2007
148views more  BMCBI 2007»
13 years 8 months ago
fREDUCE: Detection of degenerate regulatory elements using correlation with expression
Background: The precision of transcriptional regulation is made possible by the specificity of physical interactions between transcription factors and their cognate binding sites ...
Randy Z. Wu, Christina Chaivorapol, Jiashun Zheng,...
DAC
2006
ACM
14 years 1 months ago
Automated design of pin-constrained digital microfluidic arrays for lab-on-a-chip applications*
Microfluidics-based biochips, also referred to as lab-on-a-chip (LoC), are devices that integrate fluid-handling functions such as sample preparation, analysis, separation, and de...
William L. Hwang, Fei Su, Krishnendu Chakrabarty
DAC
2009
ACM
14 years 9 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...