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» Reducing dTLB Energy Through Dynamic Resizing
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ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
14 years 1 months ago
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
Rafal Karakiewicz, Roman Genov
RTAS
2011
IEEE
12 years 11 months ago
ARCH: Practical Channel Hopping for Reliable Home-Area Sensor Networks
Abstract—Home area networks (HANs) promise to enable sophisticated home automation applications such as smart energy usage and assisted living. However, recent empirical study of...
Mo Sha, Gregory Hackmann, Chenyang Lu
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
14 years 2 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
CODES
1999
IEEE
13 years 12 months ago
Software controlled power management
Reducing power consumption is critical in many system designs. Dynamic power management is an effective approach to decrease power without significantly degrading performance. Pow...
Yung-Hsiang Lu, Tajana Simunic, Giovanni De Michel...
CF
2005
ACM
13 years 9 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder