25 search results - page 4 / 5 » Reducing power consumption of instruction ROMs by exploiting... |
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Now a days, power has become a primary consideration in hardware design, and is critical in computer systems especially for portable devices with high performance and more functio...
MICRO
2002
IEEE
14 years 12 days ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
SAMOS
2004
Springer
14 years 25 days ago
2004
Springer
— Architectural resources and program recurrences are the main limitations to the amount of Instruction-Level Parallelism (ILP) exploitable from loops, the most time-consuming pa...
RTSS
1998
IEEE
13 years 11 months ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
ISLPED
2004
ACM
14 years 27 days ago
2004
ACM
Designers have invested much effort in developing accurate branch predictors with short learning periods. Such techniques rely on exploiting complex and relatively large structure...