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» Reducing power density through activity migration
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ICCAD
2009
IEEE
109views Hardware» more  ICCAD 2009»
13 years 5 months ago
Energy reduction for STT-RAM using early write termination
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
Ping Zhou, Bo Zhao, Jun Yang 0002, Youtao Zhang
DAC
2009
ACM
14 years 8 months ago
Exploring serial vertical interconnects for 3D ICs
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
Sudeep Pasricha
CODES
2008
IEEE
13 years 9 months ago
Application specific non-volatile primary memory for embedded systems
Memory subsystems have been considered as one of the most critical components in embedded systems and furthermore, displaying increasing complexity as application requirements div...
Kwangyoon Lee, Alex Orailoglu
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
HPCA
2009
IEEE
14 years 8 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...