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» Reducing the Costs of Bounded-Exhaustive Testing
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DDECS
2009
IEEE
149views Hardware» more  DDECS 2009»
13 years 11 months ago
Physical design oriented DRAM Neighborhood Pattern Sensitive Fault testing
Although the Neighborhood Pattern Sensitive Fault (NPSF) model is recognized as a high quality fault model for memory arrays, the excessive test application time cost associated wi...
Yiorgos Sfikas, Yiorgos Tsiatouhas
VTS
1999
IEEE
66views Hardware» more  VTS 1999»
13 years 12 months ago
A New Bare Die Test Methodology
1 While multichip module technology has been developed for high performance IC applications, the technology is not widely adopted due to economical reasons. One of the reasons that...
Zao Yang, K.-T. Cheng, K. L. Tai
TIP
2010
162views more  TIP 2010»
13 years 2 months ago
Multivariate Image Segmentation Using Semantic Region Growing With Adaptive Edge Penalty
Multivariate image segmentation is a challenging task, influenced by large intraclass variation that reduces class distinguishability as well as increased feature space sparseness ...
A. K. Qin, David A. Clausi
ESSMAC
2003
Springer
14 years 23 days ago
Analysis of Some Methods for Reduced Rank Gaussian Process Regression
Abstract. While there is strong motivation for using Gaussian Processes (GPs) due to their excellent performance in regression and classification problems, their computational com...
Joaquin Quiñonero Candela, Carl Edward Rasm...
DATE
2000
IEEE
87views Hardware» more  DATE 2000»
13 years 12 months ago
Test Synthesis for Mixed-Signal SOC Paths
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today’s SOC’s necessitate hierarchical test generation and system level test composition...
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu