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» Reducing the Main Memory Consumptions of FPmax* and FPclose
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ISLPED
2006
ACM
73views Hardware» more  ISLPED 2006»
14 years 4 months ago
Substituting associative load queue with simple hash tables in out-of-order microprocessors
Buffering more in-flight instructions in an out-of-order microprocessor is a straightforward and effective method to help tolerate the long latencies generally associated with ...
Alok Garg, Fernando Castro, Michael C. Huang, Dani...
SAMOS
2004
Springer
14 years 4 months ago
with Wide Functional Units
— Architectural resources and program recurrences are the main limitations to the amount of Instruction-Level Parallelism (ILP) exploitable from loops, the most time-consuming pa...
Miquel Pericàs, Eduard Ayguadé, Javi...
EMSOFT
2006
Springer
14 years 2 months ago
Energy-efficient file placement techniques for heterogeneous mobile storage systems
While hard disk drives are the most common secondary storage devices, their high power consumption and low shockresistance limit them as an ideal mobile storage solution. On the o...
Young-Jin Kim, Kwon-Taek Kwon, Jihong Kim
EUROPAR
2008
Springer
14 years 19 days ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
EUROPAR
2010
Springer
13 years 11 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...