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GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
14 years 2 months ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis
ADAEUROPE
2005
Springer
14 years 2 months ago
Integrating Application-Defined Scheduling with the New Dispatching Policies for Ada Tasks
: In previous papers we had presented an application program interface (API) that enabled applications to use application-defined scheduling algorithms for Ada tasks in a way compa...
Mario Aldea Rivas, Javier Miranda, Michael Gonz&aa...
INFOCOM
2003
IEEE
14 years 2 months ago
Distributed Queueing in Scalable High Performance Routers
—This paper presents and evaluates distributed queueing algorithms for regulating the flow of traffic through large, high performance routers. Distributed queueing has a similar ...
Prashanth Pappu, Jyoti Parwatikar, Jonathan S. Tur...
MICRO
2003
IEEE
142views Hardware» more  MICRO 2003»
14 years 2 months ago
Hardware Support for Control Transfers in Code Caches
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
Ho-Seop Kim, James E. Smith
MSR
2010
ACM
14 years 2 months ago
The evolution of ANT build systems
—Build systems are responsible for transforming static source code artifacts into executable software. While build systems play such a crucial role in software development and ma...
Shane McIntosh, Bram Adams, Ahmed E. Hassan