723 search results - page 125 / 145 » Reducing the complexity of the issue logic |
FPGA
2005
ACM
14 years 1 months ago
2005
ACM
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
KR
2004
Springer
14 years 27 days ago
2004
Springer
One of the major advances in classical planning has been the development of Graphplan. Graphplan builds a layered structure called the planning graph, and then searches this struc...
ISCAS
2003
IEEE
14 years 25 days ago
2003
IEEE
In this paper, we study the effectiveness of the multilevel paradigm in considerably reducing the diagnosis latency of distributed algorithms for fault detection in networks with ...
PLDI
2010
ACM
14 years 19 days ago
2010
ACM
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
EMSOFT
2006
Springer
13 years 11 months ago
2006
Springer
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...