—It is an important issue to reduce the power consumption of a hard disk that takes a large amount of computer system’s power. As a new trend, an NV cache is used to make a dis...
Hyotaek Shim, Jaegeuk Kim, Dawoon Jung, Jin-Soo Ki...
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...