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» Reduction Strategies and Acyclicity
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DATE
2008
IEEE
112views Hardware» more  DATE 2008»
14 years 2 months ago
An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers
Low-Cost test methodologies for Systems-on-Chip are increasingly popular. They dictate which features have to be included on-chip and which test procedures have to be adopted in o...
Paolo Bernardi, Matteo Sonza Reorda
ICDM
2008
IEEE
141views Data Mining» more  ICDM 2008»
14 years 2 months ago
Scalable Tensor Decompositions for Multi-aspect Data Mining
Modern applications such as Internet traffic, telecommunication records, and large-scale social networks generate massive amounts of data with multiple aspects and high dimensiona...
Tamara G. Kolda, Jimeng Sun
CODES
2007
IEEE
14 years 2 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
AUSAI
2007
Springer
14 years 2 months ago
Merging Algorithm to Reduce Dimensionality in Application to Web-Mining
Dimensional reduction may be effective in order to compress data without loss of essential information. Also, it may be useful in order to smooth data and reduce random noise. The...
Vladimir Nikulin, Geoffrey J. McLachlan
CIVR
2007
Springer
119views Image Analysis» more  CIVR 2007»
14 years 2 months ago
An in-memory relevance feedback technique for high-performance image retrieval systems
Content-based image retrieval with relevant feedback has been widely adopted as the query model of choice for improved effectiveness in image retrieval. The effectiveness of thi...
Ning Yu, Khanh Vu, Kien A. Hua