Sciweavers

1287 search results - page 70 / 258
» Reduction of Timed Hybrid Systems
Sort
View
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
16 years 4 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
WSC
1997
15 years 5 months ago
A Hybrid Tool for the Performance Evaluation of NUMA Architectures
We present a system for describing and solving closed queuing network models of the memory access performance of NUMA architectures. The system consists of a model description lan...
James Westall, Robert Geist
SPAA
2005
ACM
15 years 9 months ago
The expansion and mixing time of skip graphs with applications
We prove that with high probability a skip graph contains a 4-regular expander as a subgraph, and estimate the quality of the expansion via simulations. As a consequence skip grap...
James Aspnes, Udi Wieder
SC
2005
ACM
15 years 9 months ago
A Power-Aware Run-Time System for High-Performance Computing
For decades, the high-performance computing (HPC) community has focused on performance, where performance is defined as speed. To achieve better performance per compute node, mic...
Chung-Hsing Hsu, Wu-chun Feng
153
Voted
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
15 years 10 months ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...