73 search results - page 11 / 15 » Reduction of interpolants for logic synthesis |
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
AIPS
1998
13 years 9 months ago
1998
Casting planning problems as propositional satis ability problems has recently been shown to be an effective way of scaling up plan synthesis. Until now, the bene ts of this appro...
FPL
2009
Springer
14 years 7 days ago
2009
Springer
We leverage properties of the logic synthesis netlist to define both a logic element architecture and an associated technology mapping algorithm that together provide improved lo...
DDECS
2006
IEEE
14 years 1 months ago
2006
IEEE
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...
SBCCI
2009
ACM
14 years 8 days ago
2009
ACM
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...