Sciweavers

209 search results - page 4 / 42
» Refinement of Information Flow Architectures
Sort
View
MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
14 years 2 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 8 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
DAC
2010
ACM
13 years 11 months ago
Theoretical analysis of gate level information flow tracking
Understanding the flow of information is an important aspect in computer security. There has been a recent move towards tracking information in hardware and understanding the flow...
Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Tim...
CONCURRENCY
2010
114views more  CONCURRENCY 2010»
13 years 8 months ago
A step towards refining and translating B control annotations to Handel-C
Research augmenting B machines presented at B2007 has demonstrated how fragments of control flow expressed as annotations can be added to associated machine operations, and shown t...
Wilson Ifill, Steve A. Schneider
COMSWARE
2007
IEEE
14 years 2 months ago
Leveraging MAC-layer information for single-hop wireless transport in the Cache and Forward Architecture of the Future Internet
— Cache and Forward (CNF) Architecture is a novel architecture aimed at delivering content efficiently to potentially large number of intermittently connected mobile hosts. It us...
Sumathi Gopal, Sanjoy Paul, Dipankar Raychaudhuri