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HPCA
2008
IEEE
14 years 7 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
WCRE
2003
IEEE
14 years 23 days ago
Extracting an Explicitly Data-Parallel Representation of Image-Processing Programs
Our research goal is to retarget image processing programs written in sequential languages (e.g., C) to architectures with data-parallel processing capabilities. Image processing ...
Lewis B. Baumstark Jr., Murat Guler, Linda M. Will...
MSS
1999
IEEE
85views Hardware» more  MSS 1999»
13 years 11 months ago
Tape Group Parity Protection
We propose a new method of ensuring the redundant storage of information on tertiary storage, especially tape storage. Conventional methods for redundant data storage on tape incl...
Theodore Johnson, Sunil Prabhakar
GLVLSI
2008
IEEE
169views VLSI» more  GLVLSI 2008»
13 years 7 months ago
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
This paper proposes a hybrid memory architecture which consists of the following two regions; 1) a dynamic power conscious region which uses low Vdd and Vth and 2) a static power ...
Tadayuki Matsumura, Tohru Ishihara, Hiroto Yasuura
BMCBI
2010
134views more  BMCBI 2010»
13 years 7 months ago
R-Gada: a fast and flexible pipeline for copy number analysis in association studies
Background: Genome-wide association studies (GWAS) using Copy Number Variation (CNV) are becoming a central focus of genetic research. CNVs have successfully provided target genom...
Roger Pique-Regi, Alejandro Cáceres, Juan R...