11 search results - page 1 / 3 » Register Assignment for Software Pipelining with Partitioned... |
IPPS
2000
IEEE
14 years 3 months ago
2000
IEEE
Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations t...
LCTRTS
2001
Springer
14 years 3 months ago
2001
Springer
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CGO
2004
IEEE
14 years 2 months ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...
CODES
2010
IEEE
13 years 8 months ago
2010
IEEE
In high-level synthesis, pipelined designs are often restricted by the number of memory banks available to the synthesis system. Using multiple memory banks can improve the perfor...
CASES
2001
ACM
14 years 2 months ago
2001
ACM
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...