Complex application-specific media instructions and kernels are emulated with simple to implement extended subword instructions. We show that assuming extended register file ent...
Ben H. H. Juurlink, Asadollah Shahbahrami, Stamati...
This paper describes a technique for utilizing predication to support software pipelining on EPIC architectures in the presence of dynamic memory aliasing. The essential idea is t...
Benjamin Goldberg, Emily Crutcher, Chad Huneycutt,...
This paper considers the rate optimal VLSI design of a recursive data flow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We ...
This paper presents a powerful variant of the ICP (Iterative Closest Point) algorithm for registering range images using a probability field. The probability field (p-field) repre...
This paper presents an architecture for programmable systolic arrays that provides simple and e cient systolic communication. The Brown Systolic Array is a linear implementation o...