Sciweavers

1017 search results - page 78 / 204
» Register computations on ordinals
Sort
View
SAC
2005
ACM
14 years 2 months ago
Avoiding data conversions in embedded media processors
Complex application-specific media instructions and kernels are emulated with simple to implement extended subword instructions. We show that assuming extended register file ent...
Ben H. H. Juurlink, Asadollah Shahbahrami, Stamati...
IEEEPACT
2002
IEEE
14 years 2 months ago
Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines
This paper describes a technique for utilizing predication to support software pipelining on EPIC architectures in the presence of dynamic memory aliasing. The essential idea is t...
Benjamin Goldberg, Emily Crutcher, Chad Huneycutt,...
DAC
1998
ACM
14 years 1 months ago
Rate Optimal VLSI Design from Data Flow Graph
This paper considers the rate optimal VLSI design of a recursive data flow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We ...
Moonwook Oh, Soonhoi Ha
CGI
2004
IEEE
14 years 26 days ago
Range Image Registration via Probability Field
This paper presents a powerful variant of the ICP (Iterative Closest Point) algorithm for registering range images using a probability field. The probability field (p-field) repre...
Haitao Zhang, Olaf A. Hall-Holt, Arie E. Kaufman
ICPP
1991
IEEE
14 years 19 days ago
B-SYS: A 470-Processor Programmable Systolic Array
This paper presents an architecture for programmable systolic arrays that provides simple and e cient systolic communication. The Brown Systolic Array is a linear implementation o...
Richard Hughey, Daniel P. Lopresti