76 search results - page 10 / 16 » Register placement for low power clock network |
ISLPED
2007
ACM
13 years 9 months ago
2007
ACM
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
DSN
2009
IEEE
14 years 2 months ago
2009
IEEE
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...
MDM
2009
Springer
14 years 2 months ago
2009
Springer
— This work aims at minimize the cost of answering snapshot multi-predicate queries in high-communication-cost networks. High-communication-cost (HCC) networks is a family of net...
SENSYS
2009
ACM
14 years 9 days ago
2009
ACM
A specific application for wastewater monitoring and actuation, called CSOnet, deployed city-wide in a mid-sized US city, South Bend, Indiana, posed some challenges to a time syn...
MOBISYS
2011
ACM
12 years 10 months ago
2011
ACM
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...