Design of an efficient power delivery network in an soc to enable dynamic power management

Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabler for the design of any DVS technique. In this paper we show how to design an efficient power delivery network for a complex system-on-achip (SoC) so as to enable dynamic power management through assignment of appropriate voltage level (and the corresponding clock frequency) to each function block in the SoC. We show that the proposed technique reduces the power loss of the power delivery network by an average of 34% while reducing its cost by an average of 8%. Categories and Subject Descriptors B.8.2 [Performance and Reliability]: Performance Analysis and Design Aides General Terms Algorithms, Design, Performance Keywords Low-power design, power delivery network, DC-DC converter, voltage regulator

• Type: Conference
• Year: 2007
• Where: ISLPED
• Authors: Behnam Amelifard, Massoud Pedram
• Keywords: Efficient Low Voltage, Hardware, ISLPED 2007, Power Delivery Network, Voltage