1179 search results - page 128 / 236 » Relative Timing Based Verification of Timed Circuits and Sys... |
114
Voted
ITC
2000
IEEE
15 years 8 months ago
2000
IEEE
Concurrent error detection (CED) techniques (based on hardware duplication, parity codes, etc.) are widely used to enhance system dependability. All CED techniques introduce some ...
112
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RSP
1998
IEEE
15 years 8 months ago
1998
IEEE
A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved co...
141
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ASPDAC
2011
ACM
14 years 7 months ago
2011
ACM
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
140
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TREC
2003
15 years 5 months ago
2003
In this our first participation in TREC we have focused on the passage task of the question answering track. The main aim of our participation was to test the impact of various t...
137
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ICSE
2004
IEEE-ACM
16 years 4 months ago
2004
IEEE-ACM
We describe an efficient decentralized monitoring algorithm that monitors a distributed program's execution to check for violations of safety properties. The monitoring is ba...