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» Relative Timing Based Verification of Timed Circuits and Sys...
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184
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CC
2008
Springer
240views System Software» more  CC 2008»
15 years 5 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
127
Voted
ETS
2011
IEEE
220views Hardware» more  ETS 2011»
14 years 3 months ago
Structural In-Field Diagnosis for Random Logic Circuits
—In-field diagnosability of electronic components in larger systems such as automobiles becomes a necessity for both customers and system integrators. Traditionally, functional ...
Alejandro Cook, Melanie Elm, Hans-Joachim Wunderli...
146
Voted
ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
15 years 7 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar
139
Voted
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
16 years 19 days ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...
191
Voted
JMLR
2011
187views more  JMLR 2011»
14 years 10 months ago
Robust Statistics for Describing Causality in Multivariate Time Series
A widely agreed upon definition of time series causality inference, established in the seminal 1969 article of Clive Granger (1969), is based on the relative ability of the histor...
Florin Popescu