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» Reliability and Fault Tolerance in Trust
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SOSP
2009
ACM
14 years 5 months ago
Tolerating hardware device failures in software
Hardware devices can fail, but many drivers assume they do not. When confronted with real devices that misbehave, these assumptions can lead to driver or system failures. While ma...
Asim Kadav, Matthew J. Renzelmann, Michael M. Swif...
DAC
2012
ACM
11 years 11 months ago
On software design for stochastic processors
Much recent research [8, 6, 7] suggests significant power and energy benefits of relaxing correctness constraints in future processors. Such processors with relaxed constraints ...
Joseph Sloan, John Sartori, Rakesh Kumar
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
DAC
2003
ACM
14 years 9 months ago
Seed encoding with LFSRs and cellular automata
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
Ahmad A. Al-Yamani, Edward J. McCluskey
DAC
2005
ACM
14 years 9 months ago
High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trad
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
Andrey V. Zykov, Elias Mizan, Margarida F. Jacome,...