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» Reliability and Fault Tolerance in Trust
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2009
ACM
14 years 3 months ago
Flexible cache error protection using an ECC FIFO
We present ECC FIFO, a mechanism enabling two-tiered last-level cache error protection using an arbitrarily strong tier-2 code without increasing on-chip storage. Instead of addin...
Doe Hyun Yoon, Mattan Erez
ISSTA
2009
ACM
14 years 3 months ago
Specifying the worst case: orthogonal modeling of hardware errors
During testing, the execution of valid cases is only one part of the task. Checking the behavior in boundary situations and in the presence of errors is an equally important subje...
Jewgenij Botaschanjan, Benjamin Hummel
SBCCI
2009
ACM
145views VLSI» more  SBCCI 2009»
14 years 3 months ago
Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor
The purpose of this work is the proposal of a 10-Bit / 1 MSPS Analog to Digital Converter (ADC) with error correction to match the requirements of a CMOS wavefront sensor for opht...
Frank Sill, Davies W. de Lima Monteiro
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
14 years 3 months ago
Software Protection Mechanisms for Dependable Systems
We expect that in future commodity hardware will be used in safety critical applications. But the used commodity microprocessors will become less reliable because of decreasing fe...
Ute Wappler, Martin Muller
SAC
2006
ACM
14 years 2 months ago
Adaptive page-level incremental checkpointing based on expected recovery time
Incremental checkpointing, which is intended to minimize checkpointing overhead, saves only the modified pages of a process. This means that in incremental checkpointing, the time...
Sangho Yi, Junyoung Heo, Yookun Cho, Jiman Hong