1311 search results - page 29 / 263 » Remarks on Hardware Implementation of Image Processing Algor... |
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
Abstract. This paper proposes a method for implementing fractal image compression on dynamically reconfigurable architecture. In the encoding of this compression, metric computatio...
CATA
2003
13 years 9 months ago
2003
Binary morphological operations are a building block in many computer vision applications. Several iterative morphological operations are commonly performed for image analysis res...
AHS
2007
IEEE
13 years 7 months ago
2007
IEEE
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entir...
SIPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
ICML
2001
IEEE
14 years 8 months ago
2001
IEEE
A single signal processing algorithm can be represented by many mathematically equivalent formulas. However, when these formulas are implemented in code and run on real machines, ...