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ASPDAC
2001
ACM
100views Hardware» more  ASPDAC 2001»
14 years 15 days ago
Low power implementation of a turbo-decoder on programmable architectures
Low Power is an extremely important issue for future mobile radio systems. Channel decoders are essential building blocks of base-band signal processing units in mobile terminal ar...
Frank Gilbert, Alexander Worm, Norbert Wehn
ECMDAFA
2010
Springer
138views Hardware» more  ECMDAFA 2010»
13 years 6 months ago
A UML 2.0 Profile to Model Block Cipher Algorithms
Abstract. Current mobile digital communication systems must implement rigorous operations to guarantee high levels of confidentiality and integrity during transmission of critical ...
Tomás Balderas-Contreras, Gustavo Rodr&iacu...
ICCAD
1999
IEEE
108views Hardware» more  ICCAD 1999»
14 years 1 months ago
Copy detection for intellectual property protection of VLSI designs
We give the first study of copy detection techniques for VLSI CAD applications; these techniques are complementary to previous watermarking-based IP protection methods in finding ...
Andrew B. Kahng, Darko Kirovski, Stefanus Mantik, ...
ISCAS
2008
IEEE
141views Hardware» more  ISCAS 2008»
14 years 3 months ago
ASPA: Focal Plane digital processor array with asynchronous processing capabilities
— In this paper we present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits fr...
Alexey Lopich, Piotr Dudek
DATE
2009
IEEE
159views Hardware» more  DATE 2009»
14 years 3 months ago
Design and implementation of a database filter for BLAST acceleration
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
Panagiotis Afratis, Constantinos Galanakis, Euripi...