50 search results - page 6 / 10 » Resettable vector clocks |
VTS
2002
IEEE
14 years 15 hour ago
2002
IEEE
This paper presents a procedure for modifying a given set of scan vectors so that the peak power during scan testing is kept below a specified limit without reducing fault coverag...
SPAA
2005
ACM
14 years 20 days ago
2005
ACM
One approach in verifying the correctness of a multiprocessor system is to show that its execution results comply with the memory consistency model it is meant to implement. It ha...
ICCAD
2000
IEEE
13 years 11 months ago
2000
IEEE
A method to select the lengths of functional sequences in a BIST scheme for scan designs is proposed in this paper. A functional sequence is a sequence of primary input vectors ap...
FCCM
2000
IEEE
13 years 11 months ago
2000
IEEE
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
ICCD
1999
IEEE
13 years 11 months ago
1999
IEEE
If a system-on-a-chip (SOC) contains an embedded processor, this paper presents a novel approach for using the processor to aid in testing the other components of the SOC. The bas...