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» Resilient design in scaled CMOS for energy efficiency
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VLSISP
2010
148views more  VLSISP 2010»
13 years 6 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
ICSE
2008
IEEE-ACM
14 years 8 months ago
Scalable detection of semantic clones
Several techniques have been developed for identifying similar code fragments in programs. These similar fragments, referred to as code clones, can be used to identify redundant c...
Mark Gabel, Lingxiao Jiang, Zhendong Su
MASS
2010
353views Communications» more  MASS 2010»
13 years 2 months ago
Trailing mobile sinks: A proactive data reporting protocol for Wireless Sensor Networks
In Wireless Sensor Networks (WSN), data gathering using mobile sinks typically incurs constant propagation of sink location indication messages to guide the direction of data repor...
Xinxin Liu, Han Zhao, Xin Yang, Xiaolin Li, Ning W...
HPCA
2008
IEEE
14 years 8 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
MICRO
2009
IEEE
133views Hardware» more  MICRO 2009»
14 years 2 months ago
A tagless coherence directory
A key challenge in architecting a CMP with many cores is maintaining cache coherence in an efficient manner. Directory-based protocols avoid the bandwidth overhead of snoop-based ...
Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin...