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GLVLSI
2005
IEEE
85views VLSI» more  GLVLSI 2005»
14 years 3 months ago
Utilizing don't care states in SAT-based bounded sequential problems
Boolean Satisfiability (SAT) solvers are popular engines used throughout the verification world. Bounded sequential problems such as bounded model checking and bounded sequentia...
Sean Safarpour, Görschwin Fey, Andreas G. Ven...
DAC
2010
ACM
14 years 1 months ago
An AIG-Based QBF-solver using SAT for preprocessing
In this paper we present a solver for Quantified Boolean Formulas (QBFs) which is based on And-Inverter Graphs (AIGs). We use a new quantifier elimination method for AIGs, which...
Florian Pigorsch, Christoph Scholl
FPL
2004
Springer
95views Hardware» more  FPL 2004»
14 years 3 months ago
Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor
Abstract. This paper proposes an architecture that combines a contextswitching virtual configware/software SAT solver with an embedded processor to promote a tighter coupling betwe...
C. J. Tavares, C. Bungardean, G. M. Matos, Jos&eac...
SAT
2004
Springer
97views Hardware» more  SAT 2004»
14 years 3 months ago
Using Lower-Bound Estimates in SAT-Based Pseudo-Boolean Optimization
Linear Pseudo-Boolean constraints offer a much more compact formalism to express significant boolean problems in several areas, ranging from Artificial Intelligence to Electroni...
Vasco M. Manquinho, João P. Marques Silva
DATE
2005
IEEE
176views Hardware» more  DATE 2005»
14 years 3 months ago
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Linear Pseudo-Boolean Optimization (PBO) is a widely used modeling framework in Electronic Design Automation (EDA). Due to significant advances in Boolean Satisfiability (SAT), ...
Vasco M. Manquinho, João P. Marques Silva