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101
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SIGMETRICS
1997
ACM
117views Hardware» more  SIGMETRICS 1997»
15 years 6 months ago
Informed Multi-Process Prefetching and Caching
Informed prefetching and caching based on application disclosure of future I/O accesses (hints) can dramatically reduce the execution time of I/O-intensive applications. A recent ...
Andrew Tomkins, R. Hugo Patterson, Garth A. Gibson
136
Voted
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 6 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
CANDC
2007
ACM
15 years 6 months ago
Group creativity in virtual math teams: interactional mechanisms for referencing, remembering and bridging
In this paper, we present a qualitative case study of group creativity online in the domain of mathematics. We define creative work broadly, ranging from the micro-level coconstru...
Johann W. Sarmiento, Gerry Stahl
162
Voted
ICCD
2007
IEEE
109views Hardware» more  ICCD 2007»
15 years 6 months ago
Improving cache efficiency via resizing + remapping
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Subramanian Ramaswamy, Sudhakar Yalamanchili
119
Voted
ICASSP
2009
IEEE
15 years 6 months ago
What happens when cognitive terminals compete for a relaying node?
We introduce a new channel, which consists of an interference channel (IC) in parallel with an interference relay channel (IRC), to analyze the interaction between two selfish and...
Elena Veronica Belmega, Brice Djeumou, Samson Lasa...