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ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 4 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ISORC
2009
IEEE
14 years 2 months ago
Embedded JIT Compilation with CACAO on YARI
Java is one of the most popular programming languages for the development of portable workstation and server applications available today. Because of its clean design and typesafe...
Florian Brandner, Tommy Thorn, Martin Schoeberl
ESWS
2009
Springer
14 years 2 months ago
The Relevance of Reasoning and Alignment Incoherence in Ontology Matching
Abstract. Ontology matching has become an important field of research over the last years. Although many different approaches have been proposed, only few of them are committed t...
Christian Meilicke
INFOCOM
2008
IEEE
14 years 2 months ago
Area Avoidance Routing in Distance-Vector Networks
Network routing may be required, under certain applications, to avoid certain areas (or nodes) These areas can be of potential security threat, possess poor quality or have other ...
Haim Zlatokrilov, Hanoch Levy