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UML
2004
Springer
14 years 2 months ago
System-on-Chip Verification Process Using UML
Abstract. In this paper, we propose a verification methodology for System-OnChip (SoC) design using Unified Modeling Language (UML). We introduce UML as a formal model to analyze a...
Qiang Zhu, Tsuneo Nakata, Masataka Mine, Kenichiro...
EMSOFT
2006
Springer
13 years 10 months ago
Reusable models for timing and liveness analysis of middleware for distributed real-time and embedded systems
Distributed real-time and embedded (DRE) systems have stringent constraints on timeliness and other properties whose assurance is crucial to correct system behavior. Formal tools ...
Venkita Subramonian, Christopher D. Gill, Cé...
ISMIS
2000
Springer
14 years 12 days ago
An Intelligent Lessons Learned Process
A learned lesson, in the context of a pre-defined organizational process, summarizes an experience that should be used to modify that process, under the conditions for which that l...
Rosina Weber, David W. Aha, Héctor Mu&ntild...
CHARME
2003
Springer
97views Hardware» more  CHARME 2003»
14 years 14 days ago
Coverage Metrics for Formal Verification
In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complete ...
Hana Chockler, Orna Kupferman, Moshe Y. Vardi
ICSE
1989
IEEE-ACM
14 years 26 days ago
The Inscape Environment
The Inscape Environment is an integrated software development enviroment for building large software systems by large groups of developers. It provides tools that are knowledgeabl...
Dewayne E. Perry