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RSP
2006
IEEE
125views Control Systems» more  RSP 2006»
14 years 1 months ago
Creation and Validation of Embedded Assertion Statecharts
This paper addresses the need to integrate formal assertions into the modeling, implementation, and testing of statechart based designs. The paper describes an iterative process f...
Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Dem...
WORDS
2005
IEEE
14 years 1 months ago
Specification-Based Verification and Validation of Web Services and Service-Oriented Operating Systems
Service-Oriented Architecture (SOA) and Web Services (WS) have received significant attention recently. Even though WS are based on open standards and support software interoperab...
Wei-Tek Tsai, Yinong Chen, Raymond A. Paul
DATE
2004
IEEE
97views Hardware» more  DATE 2004»
13 years 11 months ago
A Formal Verification Methodology for Checking Data Integrity
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
Yasushi Umezawa, Takeshi Shimizu
FDL
2005
IEEE
14 years 1 months ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski
ICFEM
2009
Springer
14 years 2 months ago
Supporting Reuse of Event-B Developments through Generic Instantiation
It is believed that reusability in formal development should reduce the time and cost of formal modelling within a production environment. Along with the ability to reuse formal mo...
Renato Silva, Michael Butler