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» Reuse Technique in Hardware Design
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ISQED
2003
IEEE
96views Hardware» more  ISQED 2003»
14 years 3 months ago
Impact of Interoperability on CAD-IP Reuse: An Academic Viewpoint
Mind-boggling complexity of EDA tools necessitates reuse of intellectual property in any large-scale commercial or academic operation. However, due to the nature of software, a to...
Andrew B. Kahng, Igor L. Markov
ICCAD
2009
IEEE
135views Hardware» more  ICCAD 2009»
13 years 7 months ago
Enhanced reliability-aware power management through shared recovery technique
While Dynamic Voltage Scaling (DVS) remains as a popular energy management technique for real-time embedded applications, recent research has identified significant and negative i...
Baoxian Zhao, Hakan Aydin, Dakai Zhu
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 5 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
MASCOTS
2004
13 years 11 months ago
Design and Implementation of a High Speed Microprocessor Simulator BurstScalar
This paper describes the design and implementation of our high speed simulator for out-of-order microprocessors named BurstScalar. The simulator is based on the wellknown SimpleSc...
Takashi Nakada, Hiroshi Nakashima
SECURWARE
2008
IEEE
14 years 4 months ago
Enhancing Trusted Platform Modules with Hardware-Based Virtualization Techniques
—We present the design of a trusted platform module (TPM) that supports hardware-based virtualization techniques. Our approach enables multiple virtual machines to use the comple...
Frederic Stumpf, Claudia Eckert