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» Reuse Technique in Hardware Design
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PPOPP
2010
ACM
14 years 3 months ago
Load balancing on speed
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
Steven Hofmeyr, Costin Iancu, Filip Blagojevic
EMSOFT
2009
Springer
14 years 3 months ago
Clock-driven distributed real-time implementation of endochronous synchronous programs
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...
GECCO
2009
Springer
103views Optimization» more  GECCO 2009»
14 years 3 months ago
GAMA (genetic algorithm driven multi-agents)for e-commerce integrative negotiation
Software agents help automate a variety of tasks including those involved in buying and selling products over the internet. The need for handling complex highly configurable produ...
Magda Bahaa Eldin Fayek, Ihab A. Talkhan, Khalil S...
ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
14 years 2 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang
MOBICOM
2004
ACM
14 years 1 months ago
Localization for mobile sensor networks
Many sensor network applications require location awareness, but it is often too expensive to include a GPS receiver in a sensor network node. Hence, localization schemes for sens...
Lingxuan Hu, David Evans