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» Reuse Technique in Hardware Design
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MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
14 years 8 days ago
Reducing register ports for higher speed and lower energy
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
Il Park, Michael D. Powell, T. N. Vijaykumar
SIGMETRICS
2010
ACM
212views Hardware» more  SIGMETRICS 2010»
14 years 5 days ago
A mean field model of work stealing in large-scale systems
In this paper, we consider a generic model of computational grids, seen as several clusters of homogeneous processors. In such systems, a key issue when designing efficient job al...
Nicolas Gast, Bruno Gaujal
MSS
2000
IEEE
160views Hardware» more  MSS 2000»
13 years 11 months ago
Implementation of a Fault-Tolerant Real-Time Network-Attached Storage Device
Phoenix is a fault-tolerantreal-time network-attachedstorage device (NASD). Like other NASD architectures, Phoenix provides an object-based interface to data stored on network-att...
Ashish Raniwala, Srikant Sharma, Anindya Neogi, Tz...
CARDIS
2000
Springer
107views Hardware» more  CARDIS 2000»
13 years 11 months ago
JCCap: Capability-based Access Control for Java Card
: This paper describes JCCap, a protection facility for cooperating applications in the context of Java Card. It enables the control of access rights between mutually suspicious ap...
Daniel Hagimont, Jean-Jacques Vandewalle
ICCAD
1997
IEEE
108views Hardware» more  ICCAD 1997»
13 years 11 months ago
Negative thinking by incremental problem solving: application to unate covering
We introduce a new technique to solve exactly a discrete optimization problem, based on the paradigm of “negative” thinking. The motivation is that when searching the space of...
Evguenii I. Goldberg, Luca P. Carloni, Tiziano Vil...