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» Reversibility and Models for Concurrency
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POPL
2008
ACM
14 years 10 months ago
High-level small-step operational semantics for transactions
Software transactions have received significant attention as a way to simplify shared-memory concurrent programming, but insufficient focus has been given to the precise meaning o...
Katherine F. Moore, Dan Grossman
ICCD
2008
IEEE
420views Hardware» more  ICCD 2008»
14 years 6 months ago
Frequency and voltage planning for multi-core processors under thermal constraints
— Clock frequency and transistor density increases have resulted in elevated chip temperatures. In order to meet temperature constraints while still exploiting the performance op...
Michael Kadin, Sherief Reda
PLDI
2009
ACM
14 years 4 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
SENSYS
2009
ACM
14 years 4 months ago
TOSThreads: thread-safe and non-invasive preemption in TinyOS
Many threads packages have been proposed for programming wireless sensor platforms. However, many sensor network operating systems still choose to provide an eventdriven model, du...
Kevin Klues, Chieh-Jan Mike Liang, Jeongyeup Paek,...
DEXA
2009
Springer
127views Database» more  DEXA 2009»
14 years 4 months ago
The Real Performance Drivers behind XML Lock Protocols
Abstract. Fine-grained lock protocols should allow for highly concurrent transaction processing on XML document trees, which is addressed by the taDOM lock protocol family enabling...
Sebastian Bächle, Theo Härder