Sciweavers

242 search results - page 8 / 49
» Reversible Fault-Tolerant Logic
Sort
View
NOCS
2010
IEEE
13 years 4 months ago
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
Samuel Rodrigo, Jose Flich, Antoni Roca, Simone Me...
ISORC
2002
IEEE
13 years 11 months ago
End-to-End Latency of a Fault-Tolerant CORBA Infrastructure
This paper presents measured probability density functions (pdfs) for the end-to-end latency of two-way remote method invocations from a CORBA client to a replicated CORBA server ...
Wenbing Zhao, Louise E. Moser, P. M. Melliar-Smith
ICMAS
2000
13 years 8 months ago
The Adaptive Agent Architecture: Achieving Fault-Tolerance Using Persistent Broker Teams
Brokers are used in many multi-agent systems for locating agents, for routing and sharing information, for managing the system, and for legal purposes, as independent third partie...
Sanjeev Kumar, Philip R. Cohen, Hector J. Levesque
FSKD
2005
Springer
120views Fuzzy Logic» more  FSKD 2005»
14 years 4 days ago
Impact on the Writing Granularity for Incremental Checkpointing
Incremental checkpointing is an cost-efficient fault tolerant technique for long running programs such as genetic algorithms. In this paper, we derive the equations for the writing...
Junyoung Heo, Xuefeng Piao, Sangho Yi, Geunyoung P...
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 10 days ago
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Ca...