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ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
14 years 1 months ago
Understanding the backward slices of performance degrading instructions
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
Craig B. Zilles, Gurindar S. Sohi
AES
2000
Springer
117views Cryptology» more  AES 2000»
14 years 1 months ago
A Comparison of AES Candidates on the Alpha 21264
We compare the five candidates for the Advanced Encryption Standard based on their performance on the Alpha 21264, a 64-bit superscalar processor. There are several new features o...
Richard Weiss, Nathan L. Binkert
COMPSAC
1999
IEEE
14 years 1 months ago
Dynamic Software Architecture Slicing
As the complexity of software systems increases, so need for a good mechanism of abstraction. architecture design is an abstraction, hiding an immense amount of details about the ...
Taeho Kim, Yeong-Tae Song, Lawrence Chung, Dung T....
HPCA
1999
IEEE
14 years 1 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
HPCN
1999
Springer
14 years 1 months ago
Computational Experiments using Distributed Tools in a Web-Based Electronic Notebook Environment
Abstract. Computational environments used by scientists should provide high-level support for scientific processes that involve the integrated ematic use of familiar abstractions f...
Allen D. Malony, Jenifer L. Skidmore, Matthew J. S...