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ARCS
2006
Springer
14 years 2 months ago
Dynamic Dictionary-Based Data Compression for Level-1 Caches
Abstract. Data cache compression is actively studied as a venue to make better use of onchip transistors, increase apparent capacity of caches, and hide the long memory latencies. ...
Georgios Keramidas, Konstantinos Aisopos, Stefanos...
ICCD
2006
IEEE
92views Hardware» more  ICCD 2006»
14 years 7 months ago
Fast Speculative Address Generation and Way Caching for Reducing L1 Data Cache Energy
— L1 data caches in high-performance processors continue to grow in set associativity. Higher associativity can significantly increase the cache energy consumption. Cache access...
Dan Nicolaescu, Babak Salamat, Alexander V. Veiden...
IPPS
2008
IEEE
14 years 4 months ago
A transparent non-invasive file data model for algorithmic skeletons
A file data model for algorithmic skeletons is proposed, focusing on transparency and efficiency. Algorithmic skeletons correspond to a high-level programming model that takes a...
Denis Caromel, Mario Leyton
ICPP
2003
IEEE
14 years 3 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta
IJNSEC
2008
113views more  IJNSEC 2008»
13 years 10 months ago
A Fragile Associative Watermarking on 2D Barcode for Data Authentication
Two-dimensional (2D) barcode has improved the information encoded capacity, and it also has enriched the applications of barcode technique. Recently, there are researches dealing ...
Jau-Ji Shen, Po-Wei Hsu