167 search results - page 24 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
TE
2010
13 years 2 months ago
2010
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
ICCAD
1999
IEEE
13 years 12 months ago
1999
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
ICIP
2010
IEEE
13 years 5 months ago
2010
IEEE
Optical lithography is a critical step in the semiconductor manufacturing process, and one key problem is the design of the photomask for a particular circuit pattern, given the o...
DAC
2009
ACM
14 years 2 months ago
2009
ACM
This paper describes an automatic methodology for optimizing sample point selection for using in the framework of model order reduction (MOR). The procedure, based on the maximiza...