167 search results - page 29 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
ICCAD
1998
IEEE
14 years 2 months ago
1998
IEEE
Combinational verification is an important piece of most equivalence checking tools. In the recent past, many combinational verification algorithms have appeared in the literature...
DAC
2001
ACM
14 years 11 months ago
2001
ACM
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit...
TABLEAUX
1998
Springer
14 years 2 months ago
1998
Springer
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
ISPD
2004
ACM
14 years 3 months ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
HIS
2003
13 years 11 months ago
2003
Ant-based clustering and sorting is a nature-inspired heuristic for general clustering tasks. It has been applied variously, from problems arising in commerce, to circuit design, t...