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IPPS
2007
IEEE
14 years 4 months ago
Determining the Minimum Energy Consumption using Dynamic Voltage and Frequency Scaling
While improving raw performance is of primary interest to most users of high-performance computers, energy consumption also is a critical concern. Some microprocessors allow volta...
Min Yeol Lim, Vincent W. Freeh
ISPASS
2007
IEEE
14 years 4 months ago
Cross Binary Simulation Points
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jal...
MICRO
2007
IEEE
167views Hardware» more  MICRO 2007»
14 years 4 months ago
Informed Microarchitecture Design Space Exploration Using Workload Dynamics
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...
Chang-Burm Cho, Wangyuan Zhang, Tao Li
CHES
2007
Springer
327views Cryptology» more  CHES 2007»
14 years 3 months ago
On the Power of Bitslice Implementation on Intel Core2 Processor
Abstract. This paper discusses the state-of-the-art fast software implementation of block ciphers on Intel’s new microprocessor Core2, particularly concentrating on “bitslice i...
Mitsuru Matsui, Junko Nakajima
GECCO
2007
Springer
162views Optimization» more  GECCO 2007»
14 years 3 months ago
Some novel locality results for the blob code spanning tree representation
The Blob Code is a bijective tree code that represents each tree on n labelled vertices as a string of n − 2 vertex labels. In recent years, several researchers have deployed th...
Tim Paulden, David K. Smith
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