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ISCA
2005
IEEE
98views Hardware» more  ISCA 2005»
14 years 2 months ago
Techniques for Efficient Processing in Runahead Execution Engines
Runahead execution is a technique that improves processor performance by pre-executing the running application instead of stalling the processor when a long-latency cache miss occ...
Onur Mutlu, Hyesoon Kim, Yale N. Patt
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
14 years 2 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong
QSHINE
2005
IEEE
14 years 2 months ago
Retransmission Strategies for Wireless Connections with Resource-Limited Devices
Protocols designed to provide error-free communications over lossy links, at both data link and transport layers, commonly employ the idea of sliding windows, which is based on th...
Lavy Libman
WISE
2005
Springer
14 years 2 months ago
Scalable Instance Retrieval for the Semantic Web by Approximation
Abstract. Approximation has been identified as a potential way of reducing the complexity of logical reasoning. Here we explore approximation for speeding up instance retrieval in...
Holger Wache, Perry Groot, Heiner Stuckenschmidt
ACMMSP
2005
ACM
101views Hardware» more  ACMMSP 2005»
14 years 2 months ago
Transparent pointer compression for linked data structures
64-bit address spaces are increasingly important for modern applications, but they come at a price: pointers use twice as much memory, reducing the effective cache capacity and m...
Chris Lattner, Vikram S. Adve
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