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GLVLSI
2005
IEEE
152views VLSI» more  GLVLSI 2005»
14 years 2 months ago
A high speed and leakage-tolerant domino logic for high fan-in gates
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in ...
Farshad Moradi, Hamid Mahmoodi-Meimand, Ali Peirav...
CHARME
1995
Springer
120views Hardware» more  CHARME 1995»
14 years 11 days ago
Timing analysis of asynchronous circuits using timed automata
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
Oded Maler, Amir Pnueli
ISLPED
2009
ACM
118views Hardware» more  ISLPED 2009»
14 years 3 months ago
Serial sub-threshold circuits for ultra-low-power systems
This paper explores the use of serial circuits for ultra-low-power sub-threshold systems. A serial system leads to a smaller design and higher utilization, yielding 40% active ene...
Sudhanshu Khanna, Benton H. Calhoun
ICCD
1995
IEEE
51views Hardware» more  ICCD 1995»
14 years 11 days ago
Implementing a STARI chip
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
Mark R. Greenstreet
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 5 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna