Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Over the last twenty years, the open source community has provided more and more software on which the world’s High Performance Computing (HPC) systems depend for performance ...
Jack Dongarra, Peter H. Beckman, Terry Moore, Patr...
While architects understandhow to build cost-effective parallel machines across a wide spectrum of machine sizes (ranging from within a single chip to large-scale servers), the re...
J. Gregory Steffan, Christopher B. Colohan, Antoni...